Patents

Layout designs (topographies) of integrated circuits

Layout designs (topographies) of integrated circuits are a three-dimensional arrangement of elements forming an integrated circuit intended for manufacturing. This arrangement and ordering of elements follows from the electronic function that the integrated circuit is to perform.

Merriam-Webster defines a circuit as “the complete path of an electric current including usually the source of electric energy” and an integrated circuit as “a tiny complex of electronic components and their connections that is produced in or on a small slice of material (such as silicon)”.

Integrated circuits are a device with a common surface, on which certain elements with electrical functions are mounted, including transistors, resistors, capacitors, diodes, etc. These components are connected in such a way that the integrated circuit can control the electric current, by adjusting, amplifying, or otherwise modifying it.

Depending on the function that they perform, integrated circuits need a special order and arrangement, that is, they require a design of the elements that form the integrated circuit. This is referred to as the layout design (topography) of the integrated circuit.

Article 73 of Law No. 19,039 states that: “[a]n integrated circuit is a product in its final or intermediate form, intended to perform an electronic function, in which at least one of the elements must be active, and some or all of the interconnections form an integral part of the body or surface of a part thereof.”

The former is complemented by Article 74: “[t]hree-­dimensional arrangements of integrated circuits, expressed in any form and designed for manufacture, shall be considered layout designs or topographies of integrated circuits.”

“Layout designs (topographies) of integrated circuits shall be protected by this Law, provided that they are original.

Layout designs (topographies) that are the result of the intellectual effort of the creator and are not common knowledge among the creators and manufacturers of layout designs or topographies of integrated circuits, at the time of their creation, shall be considered original.

A layout design (topography) of integrated circuits that consists of a combination of common elements or interconnections shall only be protected if the combination as a whole meets the conditions indicated in the previous paragraphs” (Article 75, Law No. 19,039).

Duration period

Layout designs (topographies) of integrated circuits shall be protected for a non­renewable period of 10 years beginning from the filing date of the application or its first commercial exploitation in any part of the world (Article 78, Law No. 19,039).

Characteristics of the granted right

Although the Law establishes, in Article 83, that this right abides by the applicable provisions established in Title III of the Law regarding patents, it also establishes rights proper to layout designs (topographies) of integrated circuits in Article 76 of Law No. 19,039:

The owner of a layout design (topography) of integrated circuits shall have the exclusive right to produce, sell or market in any way the protected object and the right granted to the holder. Consequently, the owner of a layout design (topography) of integrated circuits can prevent any third party, acting without the holder’s consent, from:

• Reproducing the protected layout design (topography) of integrated circuits in full or in part for incorporation in an integrated circuit or into any other form, with the exception of reproducing any part of it that does not comply with the originality requirement set out in Article 75 of this Law.
• Selling or distributing in any way, for commercial purposes, the protected layout design (topography) of integrated circuits, or a product that incorporates an integrated circuit that contains an illegally reproduced layout design (topography) of integrated circuits.

The former is complemented by article 77:

The exclusive right of exploitation envisaged under the preceding Article shall not apply to:

• The reproductions of layout designs (topographies) of integrated circuits in which a layout design (topography) of integrated circuits created by third parties has been incorporated, for private purposes or with the sole objective of evaluation, analysis, and research or teaching.
• Commercial exploitation, as defined in said Article, of a layout design (topography) of integrated circuits, that otherwise meets the requirements of Article 75 of this Law, which has been created as a result of analysis and evaluation of a separate protected layout design (topography) of integrated circuits.
• Commercial exploitation, as defined by said Article, of an integrated circuit that incorporates an illegally reproduced layout design (topography) of integrated circuits or in relation to any object that incorporates such an integrated circuit, where the third party who orders or performs such acts did not know or have reasonable grounds to know, upon acquiring the integrated circuit or the object, that he was incorporating an illegally reproduced layout design (topography) of integrated circuits.

Notwithstanding the above, once the third party knows or has reason to believe that the layout design (topography) of integrated circuits was illegally reproduced said third party shall be able to perform any action regarding current inventory or products ordered before that time. In such cases, the owner of the protected rights shall only be able to demand payment of a sum equal to a reasonable royalty for a freely negotiated license of the layout design (topography) of integrated circuits. The court that is competent to deal cases involving infringements of layout designs (topographies) of integrated circuits shall also decide any disputes that arise regarding the determination of the royalty referred to in the previous paragraph according to the rules established for incidents in the Civil Procedure Code, without testimonial evidence and by means of a decision made in due conscience.

• An identical and original layout design (topography) of integrated circuits independently created by a third party.